Engineering
ISBT Reasoning for all banking PO,Clerk,IBPS PO,Railway,SSC,IAS,OAS Exams
Q1. 

1)  47%  2)  57% 
3)  67%  4)  77% 
5)  None of these 
Answer : 57%
Explanation :
Explanation :
Voltage regulation =(V_{NL}  V_{FL}) / V_{FL}
= (600  420)/420 = 0.57 or 57%
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Q2. 

1)  68.80 ×10^6 bytes/s  2)  24.58 ×10^6 bytes/s 
3)  68.80 ×10^3 bytes/s  4)  24.58 ×10^3 bytes/s 
5)  None of these 
Answer : 24.58 ×10^6 bytes/s
Explanation :
Explanation :
The data transfer rate = (No. of sector/track)×(Bytes in each sector)×(Rotational speed (revolution per sec.))
Rotational Speed = 7200 rpm × (1/60) = 120 rev. per sec.
= 400×512×120 = 24.58×10^{6}
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Q3. 

1)  17 ms  2)  19 ms 
3)  21 ms  4)  23 ms 
5)  None of these 
Answer : 17 ms
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Q4. 

1)  1, 2 and 3 only  2)  1, 2 and 4 only 
3)  3 and 4 only (d)  4)  1, 2, 3 and 4 
5)  None of these 
Answer : 1, 2, 3 and 4
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Q5. 

1)  0.25  2)  0.5 
3)  2  4)  4 
5)  None of these 
Answer : 4
Explanation :
Explanation :
Insertion loss= 6dB
Insertion loss (IL) is given by
I.L. = 10 log (P_{T}/P_{R}), where PT is the transmitted power PR is the power received by the load after insertion 10 log (P_{T}/P_{R}) = 6 dB
So, (P_{T}/P_{R}) = 10^{0.6} = 4
Noise factor = (P_{T}/P_{R}) = 4
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Q6. 

1)  n2/2  2)  n/2 
3)  2n – 2  4)  n – 1 
5)  None of these 
Answer : 2n – 2
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Q7. 

1)  480 bytes/s  2)  488 bytes/s 
3)  4800 bytes/s  4)  4880 bytes/s 
5)  None of these 
Answer : 4880 bytes/s
Explanation :
Explanation :
In 8 bit of a single character total bit = 8 + start bit + stop bit = 8 + 1 + 1 = 10 bit
For every 10 bit wastage of bits = 2
For 48.8 × 10^{3} bit wastage of bits.
(2 /10) x 48.8 x 103 = 9760 bit
Effective Transmission rate = 48.8 x 10^{3}  9760 = 39040 bits/s
= 39040/8 bytes/ s = 4880 bytes/s
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Q8. 

1)  32 ns  2)  64 ns 
3)  96 s  4)  192 ns 
5)  None of these 
Answer : 192 ns
Explanation :
Explanation :
Bandwidth 1GB/s means 109 bytes can be loaded online in 1 second. To load 128 bytes
= 128 x (1/10^{9} ) = 128 nsec.
Main memory latency = 64 nsec.
Time required to fetch cacheline = 128 + 64 = 192 nsec.
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Q9. 

1)  4 kbits  2)  8 kbits 
3)  16 kbits  4)  32 kbits 
5)  None of these 
Answer : 16 kbits
Explanation :
Explanation :
Given, total capacity = 32 kB = 32k × 8 bits = (256 /16) k bits
Since, IC’s are used.
So each IC provides = 256 kbits 16
14 bits address gives 16 k location. Each chip has 16 k location.
Capacity of each IC = 16 k bits.
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Q10. 

1)  derivative of the error signals  2)  integral of the error signals 
3)  steadystate error  4)  a constant which is a function of the system type 
5)  None of these 
Answer : derivative of the error signals
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